Technical Field
The present disclosure relates to integrated circuit structures, and more particularly, to an integrated circuit structure without a gate contact and method of forming the same.
Related Art
Advanced manufacturing of integrated circuits requires formation of individual circuit elements, e.g., field-effect-transistors (FETs) and the like based on specific circuit designs. A FET generally includes source, drain, and gate terminals. The gate terminal is placed between the source and drain terminals and controls the current therebetween. Transistors may be formed over a substrate and may be electrically isolated with an insulating dielectric layer, e.g., inter-level dielectric layer. Contacts may be formed to each of the source, drain, and gate terminals through the dielectric layer in order to provide electrical connection between the transistors and other circuit elements that may be formed subsequent to the transistor in other metal levels. As integrated circuits continue to be scaled down, real estate within the integrated circuit becomes more valuable. Additionally, scaled spacing and contact pitch becomes more difficult to control.